Functional Programming with IOT (FIOT) – Day 1

Today, i have started exploring how we can use Functional Programming with hardware. Typically, hardware programming is done in C, Assembly or dialects of C/C++. It is easy to compile the code written in those languages and convert it into binary to burn it onto the hardware as a new firmware.

A simple google search will show you that there are people in the past like John Lee[1] who published a book in 1972, who presented the concept of describing hardware as notations. Then in 1985, Meshkinpour[2] and Ercegovac [3] proposed another Functional Programming style language called FHDL.  So the idea about using functional programming with hardware is not new but the approach that has always been taken is to develop a separate language from the mainstream software programming languages and look at hardware as a completely different world.

The book Infrastructure as Code disagrees with the idea that hardware should be treated separately from your software component. The reason for treating hardware separately in the past was that it was expensive and it took more effort to add a new hardware or get a bigger machine for your use case. There is no reason to do that anymore as hardware is more affordable and easily accessible.

So in the upcoming blog posts i shall explore one of the most famous ICs for Internet of Things ESP8266 using a functional programming language. I am interested in hardware parallelisation, performance and code simplicity. Also, i shall explore some design patterns for functional programming languages like function composability.

Lets start this journey!



[1] J. A. N. Lee, Computer Semantics, Van Nostrand Reinhold Company, 1972.

[2] F. Meshkinpour and M. D. Ercegovac, “A functional language for description and design of digital systems: sequential constructs,” in Proceedings of the 22nd ACM/IEEE Conference on Design Automation, pp. 238–244, ACM Press, 1985. View at Scopus

[3] M. D. Ercegovac and T. Lang, “A high-level language approach to custom chip layout design,” Technical Report MICRO Project Reports 1982-83, University of California, Berkeley, Calif, USA, 1982. View at Google Scholar

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